Light emitting element driving circuit

ABSTRACT

A light emitting element driving circuit for supplying driving current I2 to a light emitting element  10  connected to one line  2  of a current mirror circuit  12  is equipped with a pulse generating circuit  20  connected to the other line  1  so that pulse current flows therethrough, and superposing means  30  for superposing a first auxiliary pulse current on the pulse current in synchronization with the rise-up time of the pulse current. The rise-up time is shortened by the superposition. In the driving circuit, a source follower circuit is connected to the current mirror circuit, and current flowing through the source follower circuit is set to be substantially proportional to current flowing through the other line of the current mirror circuit.

RELATED APPLICATION

[0001] This is a Continuation-In-Part application of internationalapplication PCT/JP02/10548 filed Oct. 10, 2002.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The present invention relates to a light emitting element drivingcircuit.

[0004] 2. Related Background Art

[0005] It has been generally carried out to write information into astorage medium such as a CD-R, CD-RW, etc., by driving a light emittingelement such as a laser diode, etc. In order to shorten this writingtime, the width of pulses for driving the light emitting element must beshortened.

SUMMARY OF THE INVENTION

[0006] When the pulse width for driving the light emitting element isshortened, the amount of light to be irradiated to a predetermined placeof a storage medium per unit time is reduced in connection with thereduction of the pulse width. Accordingly, it is necessary to increasethe intensity of light emitting per unit time in order to perform ahigh-speed pulse driving operation.

[0007] In order to increase the emitting light intensity, drivingcurrent for the light emitting element may be increased. However, inthis case, large-size transistors, wires, etc., are required, and thusthe parasitic capacitance in the driving circuit is increased. Theincrease of the parasitic capacitance lengthens the pulse rise-up timeor falling time, so that the effective pulse width is increased. Asdescribed above, in the conventional light emitting element drivingcircuit as described above, there is a restriction on the high-speeddriving operation under the state where the emitting light intensity ofthe light emitting element is enhanced.

[0008] Of course, there is a method for supplying weak DC current to thelight emitting element in advance to shorten the rise-up time of thepulses. However, such a method does not provide a drastic improvement.

[0009] The present invention has been implemented in view of the aboveproblem, and has an object to provide a light emitting element drivingcircuit which can drive a light emitting element at high speed.

[0010] In order to solve the above problem, according to the presentinvention, a light emitting element driving circuit for supplyingdriving current to a light emitting element connected to one line of acurrent mirror circuit having two parallel lines, is characterized bycomprising: a pulse generating circuit connected to the other line sothat pulse current flows through the other pulse; and superposing firstauxiliary pulse current on the pulse current in synchronization with therise-up time of the pulse current.

[0011] It is known that the current mirror circuit comprises twotransistors and has two parallel lines. The magnitude of current flowingthrough one line is coincident with or proportional to the magnitude ofcurrent flowing through the other line under a stationary state.Accordingly, if the magnitude of the current flowing through the otherline is controlled, the magnitude of the current flowing through thelight emitting element connected to the one line can be controlled.

[0012] When a predetermined voltage is applied to the control terminalof a transistor, that is, when a predetermined voltage is appliedbetween the base and the emitter in the case of a bipolar transistor orbetween the source and the gate in the case of an electric field effecttransistor, current flows through a transistor connected to the otherline, and proportional current flows through the one transistor and thusthe driving current is supplied to the light emitting element.

[0013] When pulse current flows through the other line by a pulsegenerating circuit, pulse current is supplied to the light emittingelement connected to the one line, and the light emitting element, whichis concerned, emits light. In the driving circuit described above, thesuperposing means superposes the first auxiliary pulse current on thepulse current concerned in synchronization with the rise-up time of thepulse current. In addition to the pulse current, the first auxiliarypulse current flows through the other line of the current mirrorcircuit. Therefore, the gate-source voltage of the transistorconstituting the current mirror circuit is rapidly charged. Accordingly,the current flowing through the one line of the current mirror circuitrises up rapidly. This current is supplied to the light emittingelement, and sharp rise-up light emission can be performed.

[0014] The pulse generating circuit is connected so that the pulsecurrent flows through the other line of the current mirror circuit.There may be proposed various connections and constructions for this. Asone preferable example, a construction may be provided where the pulsegenerating circuit generates a pulse voltage for controlling a switchconnected to the other line of the current mirror circuit in series. Inthis case, since the concerned switch is switched on/off by the pulsevoltage, the pulse current flows through the other line by theswitching.

[0015] Various constructions may be considered for the superposingmeans. As one preferable construction, the superposing mean comprises adifferentiating current for differentiating a pulse voltage output fromthe pulse generating circuit and inputting the pulse voltage thusdifferentiated to the other line of the current mirror circuit, and thefirst auxiliary pulse current is generated in accordance with the outputof the differentiation circuit. When the pulse voltage isdifferentiated, positive output current and negative output currentoccur at the rise-up time and falling time of the pulse voltage. Thiscurrent is set as the first auxiliary pulse current at the rise-up time.

[0016] In the light emitting element driving circuit of the presentinvention, it is preferable that the downstream side of the other lineof the current mirror circuit is connected to a current source fordefining current flowing through the concerned line. In this case, themaximum value of the current flowing through the concerned line isstabilized by the regulation of the current source, and thus theintensity of the emitting light of the light emitting element isstabilized.

[0017] Furthermore, as another preferable example of the construction ofthe superposing means, a construction where the superposing meanscomprises a one-shot circuit for outputting one shot pulse voltage insynchronization with the rise-up time of the pulse voltage, and atransistor which has a control terminal supplied with the shot pulsevoltage and is connected to the downstream side of the other line of thecurrent mirror circuit may be considered. At the rise-up time of thepulse voltage, the shot pulse voltage is input to the control terminalof the transistor, so that the first auxiliary pulse current flows intothe transistor in accordance with the shot pulse voltage and it issuperposed on the pulse current described above.

[0018] Furthermore, the downstream side of the other line of the currentmirror circuit is branched, and one of the branched lines is connectedto a first transistor for defining current flowing through the concernedline, and the superposing means comprises a one-shot circuit foroutputting a one shot pulse voltage in synchronization with the rise-uptime of the pulse voltage, and a second transistor which has a controlterminal supplied with the shot pulse voltage and is connected to thedownstream side of the other line of the branched lines. A thirdtransistor for defining current flowing through the second transistor isconnected to the downstream side of the second transistor, and thecontrol terminals of the first and third transistors are mutuallyconnected to each other.

[0019] The control terminals of the first and third transistors areconnected to each other. Therefore, when the voltage applied to onecontrol terminal is varied, the voltage applied to the other controlterminal is proportionally varied. The first transistor defines thecurrent flowing through the branched line from the other line of thecurrent mirror circuit, that is, main pulse current, and the thirdtransistor defines the auxiliary addition current generated by the shotpulse voltage, that is, the first auxiliary pulse current, so that themain pulse current and the first auxiliary pulse current are varied tomaintain a proportional relationship with each other. That is, in thisconstruction, even when the driving current is increased, the firstauxiliary pulse current is prevented from being relatively reduced.

[0020] The superposing means may superpose negative second auxiliarypulse current on the pulse current in synchronization with the fallingtime of the pulse current. In this case, the driving current fallssharply.

[0021] Oscillation is liable to occur when the light emitting element isdriven at high speed. However, if a source follower circuit is connectedto one line of the current mirror circuit, oscillation caused byvariation of the driving current can be suppressed, and the high-speeddriving of the light emitting element can be stably performed.

[0022] Furthermore, if a light emitting element driving circuit forsupplying driving current to a light emitting element connected to oneline of a current mirror circuit having two parallel lines is equippedwith a pulse generating circuit, which is connected to the other line sothat pulse current flows, and superposing means for superposing thepulse current on auxiliary pulse current in synchronization with thefalling time of the pulse current, the falling time of the drivingcurrent can shortened.

[0023] Still furthermore, it is preferable that the light emittingelement driving circuit of the present invention is equipped with asource follower circuit connected to the one line of the current mirrorcircuit, and a current setting circuit for setting current so that thecurrent flowing through the source follower circuit is substantiallyproportional to current flowing through the other line of the currentmirror circuit. In this case, by merely carrying out the setting in thecurrent setting circuit, the current supplied from the current mirrorcircuit to the light emitting element and the current supplied from thesource follower circuit can be made substantially proportional to eachother. That is, when the current supplied from the current mirrorcircuit to the light emitting element is substantially equal to zero,the current supplied from the source follower circuit to the lightemitting element is substantially equal to zero.

[0024] Still furthermore, it is preferable that the current settingcircuit has a current controlling transistor equipped to the other lineof the current mirror circuit, and the transistor and the sourcefollower circuit are connected to each other so that the current sourcefor supplying current to the source follower circuit is controlled by aninput to the control terminal of the transistor. In this case, theconstruction of the circuit is easy.

BRIEF DESCRIPTION OF THE DRAWINGS

[0025]FIG. 1 is circuit diagram showing a light emitting element drivingcircuit according to a first embodiment.

[0026]FIG. 2A is a timing chart showing the output of a pulse generatingcircuit.

[0027]FIG. 2B is a timing chart showing M1 and M2 gate charging current.

[0028]FIG. 2C is a timing chart showing driving current.

[0029]FIG. 2D is a timing chart of a light output.

[0030]FIG. 3 is a circuit diagram of a light emitting element drivingcircuit according to a second embodiment.

[0031]FIG. 4A is a timing chart of the output of a pulse generatingcircuit.

[0032]FIG. 4B is a timing chart of M1 and M2 gate charging current.

[0033]FIG. 4C is a timing chart showing driving current.

[0034]FIG. 4D is a timing chart of a light output.

[0035]FIG. 5 is a circuit diagram showing a one-shot circuit 31 foroutputting one shot pulse voltage at the rise-up time.

[0036]FIG. 6 is a circuit diagram showing a light emitting elementdriving circuit according to a third embodiment.

[0037]FIG. 7A is a timing chart of the output of a pulse generatingcircuit.

[0038]FIG. 7B is a timing chart of M1 and M2 gate charging current.

[0039]FIG. 7C is a timing chart of driving current.

[0040]FIG. 7D is a timing chart of a light output.

[0041]FIG. 7E is a timing chart showing the output of a pulse generatingcircuit.

[0042]FIG. 7F is a timing chart of M1 and M2 gate charging current.

[0043]FIG. 7G is a timing chart of driving current.

[0044]FIG. 7H is a timing chart of a light output.

[0045]FIG. 8 is a circuit diagram showing a light emitting elementdriving circuit according to a fourth embodiment.

[0046]FIG. 9A is a timing chart showing the output of a pulse generatingcircuit.

[0047]FIG. 9B is a timing chart of M1 and M2 gate charging current.

[0048]FIG. 9C is a timing chart of driving current.

[0049]FIG. 9D is a timing chart of a light output.

[0050]FIG. 10 is a circuit diagram showing a light emitting elementdriving circuit according to a fifth embodiment.

[0051]FIG. 11A is a timing chart of M1 and M2 gate changing output.

[0052]FIG. 11B is a timing chart of a light output.

[0053]FIG. 11C is a timing chart of a light output.

[0054]FIG. 12 is a circuit diagram showing a light emitting elementdriving circuit according to a sixth embodiment.

[0055]FIG. 13 is a circuit diagram showing a one-shot circuit 31 a foroutputting one shot pulse voltage at the falling time.

[0056]FIG. 14 is a circuit diagram showing a basic source followercircuit which has been hitherto well known.

[0057]FIG. 15 is a circuit diagram showing a light emitting elementdriving circuit in which the source follower circuit shown in FIG. 14 isconnected to a read channel.

[0058]FIG. 16 is a circuit diagram showing a light emitting elementdriving circuit achieved by adding a transistor m2 of the light emittingelement driving circuit shown in FIG. 14 with a current source Si1 forsupplying variable current i1.

[0059]FIG. 17 is a circuit diagram showing a light emitting elementdriving circuit.

[0060]FIG. 18 is a circuit diagram showing a light emitting elementdriving circuit having the same function as FIG. 17.

[0061]FIG. 19A is a graph showing the relationship between an inputvoltage vin and an output isf.

[0062]FIG. 19B is a graph showing the relationship between an inputvoltage vin and an output ir.

[0063]FIG. 19C is a graph showing the relationship between an inputvoltage vin and an output iL.

[0064]FIG. 19D is a graph showing the relationship between an inputvoltage vin and an output isf.

[0065]FIG. 19E is a graph showing the relationship between an inputvoltage vin and an output ir.

[0066]FIG. 19F is a graph showing the relationship between an inputvoltage vin and an output iL.

DESCRIPTION OF THE PREFERRED EMBODIMENT

[0067] A light emitting element driving circuit according to the presentinvention will be described hereunder. The same elements are representedby the same reference numerals, and overlapping description is omitted.

[0068] (First Embodiment)

[0069]FIG. 1 is a circuit diagram of a light emitting element drivingcircuit according to a first embodiment.

[0070]FIG. 2A is a timing chart of the output of a pulse generatingcircuit, FIG. 2B is a timing chart of M1 and M2 gate charging current,FIG. 2C is a timing chart of driving current and FIG. 2D is a timingchart of a light output.

[0071] The light emitting element driving circuit is equipped with acurrent mirror circuit 12 having two parallel lines 1 and 2.

[0072] It is known that the current mirror circuit 12 comprises twotransistors M1 and M2 and has two parallel lines 1 and 2. The magnitudeof current flowing through one line 2 is routinely coincident with orproportional to the magnitude of current flowing through the other line1. Accordingly, when the magnitude of the current I1 flowing through theother line 1 is controlled, the current I2 flowing through the lightemitting element 10 connected to the one line 2 can be controlled.

[0073] The transistor M1 and M2 of this embodiment comprises p-channeltype MOS electric field effect transistor, however, it may be a bipolartransistor.

[0074] When a predetermined voltage is applied to the control terminalsof the transistors M1 and M2, that is, a predetermined voltage isapplied between the base and the emitter in the case of a bipolartransistor or between the source and the gate in the case of an electricfield effect transistor, current flows through the transistor M1connected to the other line 1, and current proportional to the currentflowing through the transistor M1 flows through the transistor M2.Accordingly, driving current is supplied to the light emitting element10. The light emitting element 10 of this embodiment is a laser diode,however, it may be a light emitting diode.

[0075] According to this embodiment, the light emitting element drivingcircuit of this embodiment for supplying the driving current I2 to thelight emitting element 10 connected to one line 2 of the current mirrorcircuit 12 is equipped with a pulse generating circuit 20 connected tothe other line 1 so that pulse current flows thereto, and superposingmeans 30 for superposing first auxiliary pulse current on the pulsecurrent in synchronization with the rise-up time of the pulse currentand superposing second auxiliary pulse current on the pulse current insynchronization with the falling time of the pulse current. The firstauxiliary pulse current and the second auxiliary pulse current flow in aforward direction and in a reverse direction with respect to a mainpulse current flowing through the line 1 before superposition.

[0076] When the pulse current flows through the other line 1 by thepulse generating circuit 20, the pulse current is supplied to the lightemitting element 10 connected to the one line 2, and the light emittingelement 10 emits light. In the driving circuit of this embodiment, thesuperposing means 30 superposes the first auxiliary pulse current on thepulse current in synchronization with the rise-up time of the pulsecurrent, and superposes the second auxiliary pulse current on the pulsecurrent in synchronization with the falling time of the pulse current.

[0077] In addition to the pulse current, the first auxiliary pulsecurrent flows through the other line 1 of the current mirror circuit 12.Furthermore, in addition to the pulse current, the second auxiliarypulse current in the reverse direction flows through the line 1.Accordingly, the control terminals of the transistors used for thecurrent mirror circuit are rapidly charged/discharged, and the currentfor driving the light emitting element 10 rises up or falls sharply. Asa result, the light emitting element 10 carries out sharprise-up/falling light emission.

[0078] The pulse generating circuit 20 is connected to the other line 1of the current mirror circuit 12 so that the pulse current flowsthereto. Various connections and constructions may be considered.

[0079] In this embodiment, the pulse generating circuit 20 generates apulse voltage for controlling a switch (transistor) Q1 connected to theother line 1 of the current mirror circuit 12 in series (FIG. 2A).

[0080] In this case, since the switch Q1 concerned is switched on/off bythe pulse voltage, the pulse current i1 flows through the other line 1by this switching operation (FIG. 2B). The drain and gate of thetransistor M1 are connected to each other. Under the state where nocurrent flows, the potential of the gate is set to power sourcepotential Vcc, and the capacitance between the gate and the source ischarged by the pulse current flowing through the line 1 immediatelyafter the switch Q1 is switched on, and the potential of the gate isgradually reduced to be lower than Vcc. When the switch Q1 is switchedoff, an inverse operation is carried out, and no current flows inprinciple.

[0081] Here, the principle means as follows. Even when the switch Q1 isunder an off-state, a transistor in which weak DC current flows may beadopted. Furthermore, since the switch Q1 is a transistor, by applying apredetermined weak DC voltage to the control terminal of the transistor,the weak DC current can be made to flow through the transistor even whenthe switch Q1 is kept under an OFF-state.

[0082] Various constructions may be also considered for the superposingmeans 30.

[0083] In this embodiment, the superposing means 30 comprises adifferentiation circuit for differentiating the pulse voltage outputfrom the pulse generating circuit 20 and inputting the pulse voltagethus differentiated to the other line 1 of the current mirror circuit12, and the first auxiliary pulse current described above is generatedin accordance with the output of the differentiation circuit which isconcerned. The differentiation circuit 30 is equipped with a capacitor Cbetween the input and output thereof, and the differentiating operationis carried out by the charging/discharging of the capacitor C and aproper resistor connected to the output side of the capacitor C.

[0084] In this embodiment, the output of the pulse generating circuit 20is shaped in waveform by a waveform shaping circuit 40, and then inputto the capacitor C. The waveform shaping circuit 40 of this embodimentis an inverting and amplifying circuit, and converts the level andpolarity of the auxiliary pulse current at the superposition time to adesired state. The differentiation circuit 30 may be equipped with aresistor at the downstream side of the node point between thedifferentiation circuit 30 and the current mirror circuit. However, atransistor located at the downstream side of the node point concernedsubstantially takes charge of the function of such a resistor.

[0085] When the pulse voltage output from the pulse generating circuit20 is differentiated by the differentiation circuit 30, positive andnegative currents occur at the rise-up time and falling time of thepulse voltage. The current at the rise-up time is the first auxiliarypulse current ΔiF, and the negative second auxiliary pulse current ΔiRat the falling time. FIG. 2B is a timing chart showing these auxiliarypulse currents as charging currents to the gates of the transistors M1and M2.

[0086] These auxiliary pulse currents ΔiF and ΔiR are respectivelysuperposed on the pulse current i1 in synchronization with the rise-uptime and falling time of the pulse current i1 respectively, so that therise-up time and the falling time of the pulse current I1 are shortened.The driving current I2 is shown in FIG. 2C, and proportional to theinput current I1 flowing through the line 1, so that the rise-up timeand falling time of the driving current I2 are shortened. That is, thesuperposing means 30 superposes the second auxiliary pulse current ΔiRon the pulse current in synchronization with the falling time of thepulse current, and thus the driving current I2 falls sharply.

[0087] The rise-up time and falling time of the waveform of the drivingcurrent I2 when the superposition is carried out are shortened ascompared with the driving current i2 when the superposition as describedabove is not carried out.

[0088] The waveform of the light output of the light emitting element 10becomes slightly more flagged than the driving current by the timeconstant of the light emitting element 10 itself, however, the rise-uptime and falling time of the waveform of the light output P1 when thesuperposition is carried out are shortened as compared with the lightoutput p1 when the superposition as described. above is not carried out(FIG. 2D).

[0089] The downstream side of the other line 1 of the current mirrorcircuit 12 is connected to a current source CS1 for defining the currentflowing through the concerned line. In this case, the constant value ofthe current I1 flowing through the concerned line 1 is stabilizedthrough the current regulation by the current source CS1, so that thelight emission intensity of the light emitting element 10 is stabilized.

[0090] The current source CS1 is equipped with a transistor CSQ1connected between the switch Q1 and the ground, and a voltage source VRconnected to the control terminal of the transistor CSQ1. The transistorCSQ1 is an N-channel type MOS electric field effect transistor, and itis set to the source ground. The control terminal thereof is the gate,and thus constant current flows between the drain and source of thetransistor by fixing the gate-source voltage of the transistor to apredetermined value with the voltage source VR. The predetermined valuemay be varied.

[0091] (Second Embodiment)

[0092]FIG. 3 is a circuit diagram showing a light emitting elementdriving circuit according to a second embodiment.

[0093]FIG. 4A is a timing chart of the output of the pulse generatingcircuit, FIG. 4B is a timing chart of M1 and M2 gate charging current,FIG. 4C is a timing chart of driving current, and FIG. 4D is a timingchart of a light output.

[0094] This circuit is different from the circuit of the firstembodiment only in the construction of the superposing means 30. Thesuperposing means 30 of this embodiment is equipped with a one-shotcircuit 31 for outputting one shot pulse voltage in synchronization withthe rise-up time of the pulse voltage output from the pulse generatingcircuit 20, and a transistor 32 which has a control terminal suppliedwith the shot pulse voltage and is connected to the downstream side ofthe other line 1 of the current mirror circuit 12.

[0095] At the rise-up time of the pulse voltage (FIG. 4A) the shot pulsevoltage is input to the control terminal of the transistor 32, so thatthe first auxiliary pulse current ΔiF flows in the transistor inaccordance with the shot pulse voltage and this is superposed on thepulse current described above. FIG. 4B is a timing chart showing the sumof the auxiliary pulse current ΔiF and the pulse current as the chargingcurrent to the gates of the transistors M1 and M2.

[0096] By the superposing effect of the shot pulse current, thecapacitance of the gate of each of the transistors M1 and M2 can be morequickly charged than the case where no shot pulse current is superposed.As a result, the driving current I2 rises up quickly, and thus the lightoutput P1 of the light emitting element 10 has a shorter waveformrise-up time in accordance with the driving current than the lightoutput p1 when no superposition is carried out (FIG. 4D). Inconsideration of the fact that the emitting light waveform slightlyflags in connection with the time constant of the light emitting element10 itself, if the driving current I2 is more enhanced by the effect ofthe shot pulse current as shown in FIG. 4C than the driving current i2before the superposition, the emitting light waveform may be furtherimproved.

[0097]FIG. 5 is a circuit diagram showing a one-shot circuit 31 foroutputting the shot pulse voltage at the rise-up time of the input pulsevoltage.

[0098] Several inverting and amplifying circuits NOT are connected toone another in series from the input-side, and a capacitor C1 isinserted in parallel at some position of this connection passage, an NORcircuit is equipped with the final terminal of the inverting andamplifying circuit NOT. H represents a high level signal, and Lrepresents a low level signal. The NOR circuit is a circuit foroutputting “L” when “H” is input to at least one input terminal, thatis, a circuit for outputting “H” only when “L” is input to both theinput terminals.

[0099] With respect to the input of the NOR circuit, one input to theNOR circuit is set from “H” to “L” by the inverting circuit NOT duringthe initial stage at the rise-up time of the input pulse voltage (from Lto H), and the other input of the NOR circuit before this input is “L,”so that “H” is instantaneously output from the NOR circuit. When thecharging of the capacitor C1 is started, the other input to the NORcircuit is set to “H,” and thus the output of the NOR circuit is set to“L”. As described above, the one-shot circuit 31 outputs the pulsevoltage of “H” only at one moment.

[0100] In the circuit shown in FIG. 3, the transistor 32 is connected tothe upstream side of the switch Q1, however, it may be connected to thedownstream side of the switch Q1, that is, connected to the node pointA.

[0101] (Third Embodiment)

[0102]FIG. 6 is a circuit diagram showing a light emitting elementdriving circuit according to a third embodiment.

[0103]FIG. 7A is a timing chart of the output of a pulse generatingcircuit, FIG. 7B is a timing chart of the M1 and M2 gate chargingcurrent, FIG. 7C is a timing chart showing driving current, FIG. 7D is atiming chart of a light output, FIG. 7E is a timing chart of the outputof the pulse generating circuit, FIG. 7F is a timing chart of the M1 andM2 gate charging current, FIG. 7G is a timing chart of the drivingcurrent, and FIG. 7H is a timing chart of the light output.

[0104] In this circuit, a current source (transistor CSQ2) is equippedat the downstream side of the transistor 32 of the superposing means 30of the second embodiment.

[0105] That is, the downstream side of the other line 1 of the currentmirror circuit 12 is branched, and one line la of the branched lines isconnected to a first transistor CSQ1 (current source) for defining thecurrent flowing through the line 1 a. The superposing means 30 comprisesa one-shot circuit 31 for outputting one shot pulse voltage insynchronization with the rise-up time of the pulse voltage output fromthe pulse generating circuit 20, and a second transistor 32 which has acontrol terminal supplied with the shot pulse voltage and is connectedto the downstream side of the other line (1 b) of the branched lines. Athird transistor CSQ2 for defining the current flowing through thesecond transistor 32 is connected to the downstream side of the secondtransistor 32, and the control terminals (gates) of the first and thirdtransistors CSQ1 and CSQ2 are mutually connected to each other.

[0106] The control terminals of the first and third transistors CSQ1 andCSQ2 are connected to each other. Therefore, when the voltage appliedfrom the voltage source VR to one control terminal is varied, thevoltage applied to the other control terminal is proportionally varied.The first transistor CSQ1 defines the current flowing through the linela branched from the other line 1 of the current mirror circuit 12, thatis, the main pulse current, and the third transistor CSQ2 defines theauxiliary addition current generated by the shot pulse voltage, that is,the first auxiliary pulse current. Therefore, the main pulse current andthe first auxiliary pulse current are varied while being maintained aproportional relationship with each other. That is, in thisconstruction, when the driving current I2 is increased, the firstauxiliary pulse current is prevented from being relatively reduced. Thiswill be described hereunder.

[0107]FIG. 7A, FIG. 7E are timing charts showing the output voltage ofthe pulse generating circuit 20, FIG. 7B is a timing chart of the M1 andM2 gate charging current in the first embodiment, FIG. 7F is a timingchart of the M1 and M2 gate charging current in the third embodiment,FIG. 7C is a timing chart of driving current I2 in the first embodiment,FIG. 7G is a timing chart of driving current I2 in the third embodiment,FIG. 7D is a timing chart of the light output in the first embodiment,and FIG. 7H is a timing chart of the light output in the thirdembodiment.

[0108] In the construction of the first embodiment, the absolute valueof the auxiliary pulse current is invariable, and thus when the mainpulse current is increased, the attribution rate of the auxiliary pulsecurrent is relatively reduced. In this case, as compared with a casewhere the driving current I2 is set to a low value, the rise-up time ofthe driving current I2 is relatively longer. It is a matter of coursethat the rise-up time of the light output is relatively longer.

[0109] On the other hand, in the construction of the third embodiment,the auxiliary pulse current is increased in proportion to the pulsecurrent, and the auxiliary pulse current likewise contributes to thedriving current I2 even when the main pulse current is increased.Accordingly, even when the driving current I2 is set to a high value,the rise-up time of the driving current I2 remains short, and therise-up time of the light output also remains short.

[0110] In this embodiment, the voltage source VR is set as a variablevoltage source. Accordingly, the magnitude of the driving current I2 canbe switched as occasion demands. For example, the driving current I2 isincreased during an operation of writing information into a CD-R at highspeed, and it is reduced during an operation of writing information intoa CD-R at low speed.

[0111] (Fourth Embodiment)

[0112]FIG. 8 is a circuit diagram showing a light emitting elementdriving circuit according to a fourth embodiment. In this circuit, thesuperposing means 30 of the third embodiment is added to the superposingmeans 30 of the first embodiment to form new superposing means 30 as awhole. Other construction is the same as the third embodiment.

[0113]FIG. 9A is a timing chart showing the output voltage of the pulsegenerating circuit 20, FIG. 9B is a timing chart of the M1 and M2 gatecharging current, FIG. 9C is a timing chart of driving current i2 and I2of LD, and FIG. 9D is a timing chart of the light outputs p1 and P1before and after the superposition.

[0114] As compared with the driving circuit of the third embodiment, theeffect of the superposing means 30 of the first embodiment, that is, theeffect of shortening the rise-up time and falling time of the pulsecurrent can be added, and the light emitting element 10 can be driven athigh speed.

[0115] (Fifth Embodiment)

[0116]FIG. 10 is a circuit diagram showing a light emitting elementdriving circuit according to a fifth embodiment. In this circuit, asource follower circuit 50 is added to the upstream side of the lightemitting element 10 in the driving circuit of the fourth embodiment.

[0117] The source follower circuit 50 is equipped with a P-channel typeMOS electric field effect transistor 52 connected to the downstream sideof the current source 51, and an N-channel MOS electric field effecttransistor connected between the power source voltage Vcc and the gateof the P-channel MOS electric field effect transistor 52, and the gateof the N-channel MOS electric field effect transistor 53 is connected tothe source of the P-channel MOS electric field effect transistor 52. Inthis circuit, the P-channel and N-channel MOS electric field effecttransistors 52 and 53 have the same gate-source voltage, and can controlthe Q-value of the circuit. That is, if the Q value is lowered by usinga proper circuit constant, oscillation is suppressed in the drivingcurrent.

[0118]FIG. 11A is timing chart of M1 and M2 gate charging current, whileFIG. 11B and FIG. 11C are timing charts of the light output.

[0119] When the pulse driving speed is increased (the rise-up time andthe falling time are set to about ins), severe ringing (oscillation) isliable to be induced in accordance with the relationship between theoutput terminal capacitance and the wiring inductance from the outputterminal of the IC containing the driving circuit concerned to the lightemitting element 10 (FIG. 11A). The circuit cannot be practically usedunder the ringing state. Therefore, it has been believed that thewaveform must be finally flagged by adding a snubber circuit, etc., tothe output terminal in order to suppress ringing (FIG. 11B). However, inthis embodiment, by adding the source follower circuit 50, an idealoutput waveform can be achieved without ringing while very high-speedrise-up and falling are implemented (FIG. 11C).

[0120] That is, the light emitting element 10 is liable to sufferoscillation during the high-speed driving operation. However, since thesource follower circuit 50 described above is connected to the one line2 of the current mirror circuit 12, the oscillation caused by thevariation of the driving current I2 can be suppressed and the lightemitting element 10 can be stably driven at high speed. The DC currentfrom the current source 51 is supplied to the light emitting element 10at all times.

[0121] In any embodiment described above, the DC current may be suppliedto the light emitting element 10 in advance to enhance the responsecharacteristics.

[0122] (Sixth Embodiment)

[0123]FIG. 12 is a circuit diagram showing a light emitting elementdriving circuit according to a sixth embodiment. The light emittingelement driving circuit of this embodiment is different from the lightemitting element driving circuit of the second embodiment in that aone-shot circuit 31 a is used in place of the one-shot circuit 31. Theone-shot circuit 31 a outputs one shot pulse voltage at the falling timeof the main pulse current. The effective falling time of the currentflowing through the line 1 in synchronization with the input of the shotpulse voltage is shortened.

[0124] The light emitting element driving circuit is equipped with atransistor 32 a for controlling the current amount between the drain ofthe transistor M1 and the power source potential Vcc. The transistor 32a is a P-type MOS electric field effect transistor, and it is conductedby a low level voltage input to the gate.

[0125] The transistor 32 a is turned on only for a moment at the fallingtime of the main pulse current flowing through the line 1 before theshot pulse voltage is input to the transistor 32 a, so that the chargesaccumulated in the capacitor between the gate and source of thetransistors M1 and M2 are quickly discharged and the driving current I2is quickly reduced. That is, the negative second auxiliary pulse currentΔiR flowing in the opposite direction to the pulse current before thesuperposition is generated by the transistor 32 a. As a result, theoutput current to the light emitting element 10 falls sharply, and thelight output also falls quickly. This construction may be combined withthe light emitting element driving circuit described above.

[0126]FIG. 13 is a circuit diagram of a one-shot circuit for outputtingone shot pulse voltage when the pulse current before the superpositionfalls. The one shot circuit 31 a is different from the one shot circuit31 shown in FIG. 5 in that the output of the NOT circuit at the laststage as well as the output of the NOT circuit at the first stage isinput to the NAND circuit. When one pulse voltage is applied to the oneshot circuit 31 a, a low level voltage is output from the NAND circuitin synchronization with the falling time of the pulse voltage. Thecircuit construction for increasing the speed of the responsecharacteristics at the falling time may be combined with the circuit ofany embodiment described above.

[0127] The light emitting element driving circuit shown in FIG. 15 usesthe source follower circuit, and a method of controlling the currentflowing through the source follower circuit 50 with an input signal willbe described hereunder.

[0128]FIG. 14 is a circuit diagram showing a basic source followercircuit 50 which is well known. The source follower circuit 50 shown inFIG. 10 is such a circuit. FIG. 19A is a graph showing the relationshipbetween the input voltage vin and the output isf, FIG. 19B is a graphshowing the relationship between the input voltage vin and the outputir, FIG. 19C is a graph showing the input voltage vin and the output iL,FIG. 19D is a graph showing the relationship between the input voltagevin and the output isf, FIG. 19E is a graph showing the relationshipbetween the input voltage vin and the output ir, and FIG. 19F is a graphshowing the relationship between the input voltage vin and the outputiL.

[0129] Representing a constant current source by i1, current flowingthrough the constant current source i1 flows through a P-MOS typetransistor m2 to the ground. This current is proportional to currentsupplied from the power source Vdd through the N-MOS type transistor mlto the load 10. That is, the voltage between the source and gate of theP-MOS type transistor m2 is equal to the voltage between the source andgate between the N-MOS type transistor, and the currents flowing throughthese transistors are proportional to each other, and also the variationof the Q-value is reduced by adopting such a circuit for the lightemitting element driving circuit. In this case, the source followercurrent isf supplied from the source follower circuit 50 to the lightemitting element 10 is set to a fixed value (see FIG. 19A).

[0130] The light emitting element driving circuit described above isapplicable to players for CD-R, CD-RW, DVD-R, DVD-RW, etc. In theseplayers, current is supplied to the light emitting element 10 at thesignal reading time. A path to which the driving current is supplied atthe signal reading time is set as a read channel.

[0131]FIG. 15 is a circuit diagram showing the light emitting elementdriving circuit in which the source follower circuit 50 shown in FIG. 14is connected to the read channel. The light emitting element 10 issupplied with read current ir and source follower current isf. The readcurrent ir is a current flowing from a power source Vdd through one lineof a current mirror circuits having two parallel lines. This one line isa path for current flowing through the channel of the P-MOS typetransistor m5. The other line of the current mirror circuit is connectedfrom the power source Vdd through the P-MOS type transistor m4, theP-MOS type transistor m3 and the resistor r1. The current flowingthrough the current mirror circuit can be controlled by controlling thevoltage (gate-source voltage) applied to the gate of the transistor m3.

[0132] The gate of the transistor m3 is connected to the output terminalof an operational amplifier op1. Therefore, when the input voltage vinis input to the non-inverted input terminal of the operation amplifierop1, the output terminal potential of the operational amplifier op1 isincreased, the current flowing through the other line of the currentmirror circuit is increased, and the current proportional to the abovecurrent flows as the read current ir to the one line. When the currentflowing through the transistor m3 is increased, the current flowingthrough the resistor r1 is increased, and the source potential rises upto reduce the gate-source voltage. In addition, the instantaneousvoltage between the inverted input terminal and non-inverted inputterminal of the operational amplifier op1 is also reduced. Therefore,the increase of the current flowing through the other line by theoperational amplifier op1 suffers feedback, and the read current islinearly increased with respect to the input voltage (see FIG. 19B). Aresistor r2 is connected between the non-inverted output terminal of theoperation amplifier op1.

[0133] The current iL supplied to the light emitting element 10 as aload is a read current ir shown in FIG. 19B and an addition current of asource follower current isf. The read current ir is controlled by theinput voltage vin, however, the source follower current isf is notcontrolled by the input voltage vin. Therefore, as shown in FIG. 19C,even when the input voltage vin is equal to 0V, the output current iLcontains the source follower current isf having a fixed level. Even whensuch a current is supplied in advance, there is no problem, however, itis preferable to reduce the source follower current isf in accordancewith the input voltage vin in order to reduce needless powerconsumption.

[0134] Prior to the description of the circuit thus constructed, thesource follower circuit 50 for varying the source follower current isfindependently of the input voltage vin will be described.

[0135]FIG. 16 is a circuit diagram showing a light emitting elementdriving circuit added with a current source Si1 for supplying variablecurrent i to the transistor m2 of the light emitting element drivingcircuit shown in FIG. 14. The source follower current isf and thevariable current i1 are substantially in a proportional relationshipwith each other in a practical current range. The variable current i1 ofthe current source Si1 comprising the P-MOS type transistor can becontrolled by adjusting the output voltage of the variable power sourcevl for controlling the gate potential of the P-MOS type transistor. Bycombining the source follower circuit 50 described above with any lightemitting element driving circuit described above, the source followercurrent isf can be varied.

[0136] Next, a source follower circuit in which the source followercurrent isf is varied interlockingly with the input voltage vin will bedescribed.

[0137]FIG. 17 is a circuit diagram showing a light emitting elementdriving circuit having such a function. It is different from the lightemitting element driving circuit shown in FIG. 15 in that the currentsource i1 is constructed by a current mirror circuit 50 comprising twotransistors m7 and m8, and in that the transistor m6 is connected to theinput-side transistor m7 in series, the transistor m6 is connected tothe transistor m3 in parallel, and the same voltage as m3 is input tothe gate of the transistor m6. The current flowing through thetransistor m6 is proportional to the transistor size ratio thereof tothe transistor m3.

[0138] The current flowing through the transistor m3 is proportional tothe current ir supplied to the light emitting element 10, and thesecurrents are proportional to the input voltage vin. The current flowingthrough the transistor m3 is proportional to the input voltage vin, sothat the current flowing through the transistor m6 is proportional tothe input voltage vin, the current flowing through the transistor m8 ofthe current mirror circuit which is paired with the transistor m6 isproportional to the input voltage vin, and the source follower currentisf of the source follower circuit 50 using the current mirror circuitas the current source is proportional to the input voltage vin (see FIG.19D and FIG. 19E).

[0139] The current iL flowing through the light emitting element 10 as aload is equal to the sum of the variable current ir and the sourcefollower current isf, and thus the current iL is proportional to theinput voltage vin as shown in FIG. 19F.

[0140] The transistor m7 is a P-MOS type, and the drain thereof isconnected to the drain of the N-MOS type transistor m6. The transistorm8 is also a P-MOS type. The node point of the downstream side of thetransistor m6 corresponds to the node point between the downstream sideof the transistor m3 and the resistor rl, and both the current flowingthrough the transistor m6 and the current flowing through the transistorm3 flow through the resistor r1, and in connection with the increase ofthese currents, the potential of the node point rises, and excessiveincrease of the current can be suppressed.

[0141]FIG. 18 is a circuit diagram of a light emitting element drivingcircuit having the same function as FIG. 17. In this circuit, thetransistor m7 shown in FIG. 17 is substituted by the transistor m4. Inthis case, the transistor m6 is common to the transistor m3, and thus itis naturally necessarily omitted.

[0142] According to the circuit of FIG. 18 and FIG. 19A to FIG. 19F,when the input vin is equal to 0(V), the load current iL can be set to0(A). Furthermore, a user is not required to pay attention to the sourcefollower current isf, and thus the circuit design using this circuit iseasily performed.

[0143] When the circuit shown in FIG. 17 or 18 and the circuitcontaining the one-shot circuit described above are combined with eachother, a current supplying current source (transistor m3) is connectedto the input-side line of the current mirror circuit for supplyingcurrent to the light emitting element 10, and the respective circuitsmay be connected to one another so that the current flowing through thesource follower circuit is proportional to the current flowing throughthe above current source.

[0144] For example, in the case of the circuit shown in FIG. 10, thesource follower circuit 50 may be connected so that the transistor CSQ1is the transistor m3. In this case, the amplitude of the pulse currentsupplied to the light emitting element 10, that is, the pulse heightvalue can be determined by controlling the transistor m3. When thetransistor m3 is connected as a different element to the transistor CSQ1in parallel, the DC level of the pulse current supplied to the lightemitting element 10 can be determined.

[0145] As described above, it is preferable that the light emittingelement driving circuit shown in FIG. 17 and FIG. 18 is equipped with asource follower circuit 50 connected to one line (a line at thetransistor M2 side: see FIG. 10) of the current mirror circuit, and acurrent setting circuit (m8, m7, m6, m3, op1, r1, r2) for setting thecurrent so that the current flowing through the source follower circuit50 is substantially proportional to the current flowing through theother line (a line at the transistor M1 side: see FIG. 10) of thecurrent mirror circuit. Here, “substantially” means that it does notconform with a strict theoretical equation, and the relationship may bedisplaced by several percentages. In this case, by carrying out only thesetting in the current setting circuit, the current ir supplied from thecurrent mirror circuit to the light emitting element 10 and the currentisf supplied from the source follower circuit 50 can be made to besubstantially proportional to each other. That is, when the currentsupplied from the current mirror circuit to the light emitting element10 is substantially equal to zero, the current supplied from the sourcefollower circuit to the light emitting element 10 is substantially equalto zero.

[0146] Furthermore, the current setting circuit has the currentcontrolling transistor m3 equipped to the other line of the currentmirror circuit, and the transistor m3 and the source follower circuit 50are connected to each other so that the current source m8 for supplyingcurrent to the source follower circuit 50 is controlled by the input tothe control terminal of the transistor m3 (the gate in the electricfield effect transistor, the base in the bipolar transistor), and theconstruction of the circuit is simple.

[0147] According to the light emitting element driving circuit of thepresent invention, the light emitting element can be driven at highspeed.

What is claimed is:
 1. A light emitting element driving circuit forsupplying driving current to a light emitting element connected to oneline of a current mirror circuit having two parallel lines, comprising:a pulse generating circuit connected to the other line so that pulsecurrent flows through the other pulse; and superposing first auxiliarypulse current on the pulse current in synchronization with the rise-uptime of the pulse current.
 2. The light emitting element driving circuitaccording to claim 1, wherein the pulse generating circuit generates apulse voltage for controlling a switch connected to the other line inseries.
 3. The light emitting element driving circuit according to claim2, wherein the superposing mean comprises a differentiation circuit fordifferentiating a pulse voltage output from the pulse generating circuitand inputting the pulse voltage thus differentiated to the other line,and wherein the first auxiliary pulse current is generated in accordancewith the output of the differentiation circuit.
 4. The light emittingelement driving circuit according to claim 1, wherein the downstreamside of the other line is connected to a current source for definingcurrent flowing through the concerned line.
 5. The light emittingelement driving circuit according to claim 2, wherein the superposingmeans comprises a one-shot circuit for outputting one shot pulse voltagein synchronization with the rise-up time of the pulse voltage, and atransistor which has a control terminal supplied with the shot pulsevoltage and is connected to the downstream side of the other line. 6.The light emitting element driving circuit according to claim 2, whereinthe downstream side of the other line is branched, one of the branchedlines is connected to a first transistor for defining current flowingthrough the concerned line, the superposing means comprises a one-shotcircuit for outputting a one shot pulse voltage in synchronization withthe rise-up time of the pulse voltage, and a second transistor which hasa control terminal supplied with the shot pulse voltage and is connectedto the downstream side of the other line of the branched lines, a thirdtransistor for defining current flowing through the second transistor isconnected to the downstream side of the second transistor, and thecontrol terminals of the first and third transistors are mutuallyconnected to each other.
 7. The light emitting element driving circuitaccording to claim 1, wherein the superposing means superposes negativesecond auxiliary pulse current on the pulse current in synchronizationwith the falling time of the pulse current.
 8. The light emittingelement driving circuit according to claim 1, wherein a source followercircuit is connected to one line of the current mirror circuit.
 9. Alight emitting element driving circuit for supplying driving current toa light emitting element connected to one line of a current mirrorcircuit having two parallel lines, comprising a pulse generating circuitconnected to the other line so that pulse current flows, and superposingmeans for superposing the pulse current on auxiliary pulse current insynchronization with the falling time of the pulse current.
 10. Thelight emitting element driving circuit according to claim 1 or 9,further comprising: a source follower circuit connected to the one lineof the current mirror circuit, and a current setting circuit for settingcurrent so that the current flowing through the source follower circuitis substantially proportional to current flowing through the other lineof the current mirror circuit.
 11. The light emitting element drivingcircuit according to claim 10, wherein the current setting circuit has acurrent controlling transistor equipped to the other line of the currentmirror circuit, and the transistor and the source follower circuit areconnected to each other so that the current source for supplying currentto the source follower circuit is controlled by an input to the controlterminal of the transistor.